Grid-Connected Phase-Locked Loop Technology Based on a Cascade Second-Order IIR Filter

Grid-voltage Synchronization Algorithms Based on Phase-locked Loop and Frequency-locked Loop for Power Converters

Extended Range Second Order Digital Phase Locked Loop

Phase error dynamics of a conventional second order Digital Phase Locked Loop (DPLL) and that of a newly proposed modified second order DPLL (MSODPLL) have been studied using digital computers. Ranges of initial conditions leading to the phase locking condition were determined from computer simulation of both conventional and modified second order DPLL. Lyapunov exponents were also examined, fo...

Software Phase Locked Loop Design Using C2000TM Microcontrollers for Single Phase Grid Connected Inverter

Grid connected applications require an accurate estimate of the grid angle to feed power synchronously to the grid. This is achieved using a software phase locked loop (PLL). This application report discusses different challenges in the design of software phase locked loops and presents a methodology to design phase locked loops using C2000 controllers for single phase grid connection applicati...

Computer investigation of a sine and cosine based phase-locked loop for single phase grid connected inverter

This paper presents a new approach for PLL for synchronization with the public grid phase and frequency of grid-connected single phase inverter. The approach uses trigonometric transformations of the inverter output voltage and the grid voltage. The proposed mathematical model is then studied by means of computer simulation for different voltage amplitudes of the grid voltage as well as the inv...

Simulation Of Acquisition Behavior Of Second-Order Analog Phase-Locked Loop Using Phase Error Process

This work presents a method for modeling and simulating a second-order analog phase-locked loops (PLL) in time domain for studying its acquisition behavior. The proposed method uses phase error process for analyzing the PLL characteristics. The method enables to study the lockin and pull-in phenomena of analog PLL and the effects of changing phase offset and voltage offset values on acquisition...